Early CPU Memory Management

Cluster discusses historical memory addressing schemes like segmentation, banking, and early MMUs in processors such as 8086, 6502, PDP-11, and IBM 360, highlighting limitations and workarounds in pre-flat memory eras.

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Keywords

RAM COM e.g CPU PC UNIX ROM MIT PREVIOUS UNLK memory registers 16 16 bit ram address register pdp 6502 bit

Sample Comments

blueflow Sep 21, 2022 View on HN

Side fact: Microprocessors did not have virtual memory or paging back then. They operated 1:1 on the bus lines.

iphorde Dec 30, 2020 View on HN

Arrays at the hardware level can be implemented. Though, this wasn't always the case. Direct access to memory didn't really become a thing until the late 60s, with the advent of the Memory management unit (MMU). My first experience was with the 6502, and 6510. For instance the 6510 had 64k of addressable memory, but good luck ever having all of it.Many architectures had each word loaded into a register, and you never had direct access to the memory. Those were absolute nightmares by

drallison Nov 27, 2021 View on HN

I believe the 8086, as originally designed and implemented, had a segmented address space with base and bounds registers in the style of the CDC 6600. This rudimentary but effective memory management approach was scrapped by Intel to make the 8086 part commensurate with the stepper reticle and semiconductor process of the time.

wglb Apr 23, 2019 View on HN

Wait--weren't MMUs available back even on the 65/67?

wtarreau Oct 31, 2019 View on HN

segment registers were a cheap MMU before its age. It was the only way to run code without relocation tables at various addresses. Mind you that at this era the whole operating system fitted in 40kB of RAM! My old turbo-pascal 3.0 editor+compiler was something around 37 kB! Just try to write a hello world of that size nowadays! It's pointless to criticize the past based on 10000 times more powerful hardware nowadays, which doesn't even deliver the same work faster due to the tremendous

cmrdporcupine Sep 11, 2023 View on HN

For sure, and up until the mid-to-late 80s RAM speeds were higher than processor speeds. So approaches to architecture were totally different.Most minicomputer class processors were sewn together from multiple chips and transistors; even their register sets for the CPU were often not dissimilar from main memory. Texas Instrument's minicomputer (and later microcomputer) architecture even just put registers in RAM. In the microcomputer world, the 6502 got around having a very small registe

jhallenworld Jan 20, 2022 View on HN

It sounds like the same situation as large model on 8088. I'm wondering if any 8-bit systems did anything like this, but I don't think so.

inkyoto Sep 12, 2023 View on HN

You are correct. I have long forgotten about the mapped memory and was thinking about Unibus device registers having long 18-bit addresses. The 11/70 also had separate instruction and data spaces which did not exist in earlier models.

Animats Jun 29, 2015 View on HN

Many C programmers assume a single flat memory space. Most machines today have that. There's a long history of machines that didn't: Intel 286 in segmented mode, some Pentium variants in segmented mode beyond 4MB (Linux supports this in the kernel), IBM AS/400, Unisys Series B 36-bit word machines, Burroughs 5500/6700/Unisys Series A segmented machines where an address is a file-like path, Motorola CPUs where I/O space and memory space are distinct, and old DEC PDP

baq Sep 17, 2025 View on HN

didn't we call it 'segmented memory' back in DOS days...?