CPU Cache Locality
This cluster discusses CPU cache performance, memory locality, cache misses, and optimization techniques for improving access patterns and reducing latency in low-level programming.
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Why do you think you'd suffer in CPU time and memory locality?
It also helps with cache locality.
Accessing RAM is very slow and CPU caches don't scale, though. So it's not as simple as you're presenting it
Your needles (search terms) need to be quite long if you want to save on memory traffic: cache lines are 64-128 bytes and random access to standard DRAM is slower than sequential access. It can help if your data is in-cache though. (Or if you have an unusual system where memory is faster than what CPU can keep up with).
It's likely that the CPU overhead is lower than a cache miss.
Interesting but you must also take care of the CPU caches..
Better L1/L2 cache performance, perhaps?
I'm not that low-level programmer, but my guess would be loading to CPU cache a whole memory segment at once.
Geez you use this tool for quick answers, it's not a manual specification. Do you also hate the CPU cache because it doesn't always point to correct memory?
Is any of this applicable to designing a CPU cache?