Process Node Marketing
Discussions center on the misconception that semiconductor process node names like 2nm or 5nm represent actual transistor sizes, clarifying they are marketing terms for density and technology generations rather than literal dimensions, with debates on physical scaling limits.
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How is it possible to have 1.4nm transistors?
10nm doesn't actually means that the transistors are 10nm-sized
yeah but how many nm are left? There's a phsyical limit to transistor size!
It looks like they're using a 65nm process, so yeah, fab space appears to be limiting them. Modern designs are well under 20nm.
I'm afraid the support structures around the chip didn't shrink at the same scale as the transistors.
Does anyone have experience with die shrink on modern chips? How does it compare?
“5 nm node is expected to have a contacted gate pitch of 51 nanometers and a tightest metal pitch of 30 nanometers” - wikipediaIts a marketing term
Feature size seems to be 15nm, from the article. 2nm is marketing speech for transistor density.
The chip is not smaller than 3.5nm; but a component on the chip is that small.
Reminder that technology nodes (5nm, 2nm, etc.) refer to the smallest feature, not some dimension of the transistor channel. For reference, a silicon atom is 0.21nm.