CPU Cache Sharing
The cluster discusses shared L3 cache sizes and architectures in high-core-count CPUs, including comparisons between AMD and Intel chips, NUMA-like behaviors, and performance implications of limited cache per core.
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Why can't we have both? L4 cache anyone?
L2 cache isn't shared, at least looking at the die picture.
Not if those CPUs share one cache!
Aren't AMD parts already (cache-coherent) NUMA?
Don't we already hit that on GPUs? Or do they only have shared caches?
Looks pretty cache starved! One sixth the cache per core of 9684x, a two year old chip.
Looks like server chips with less L3 cache.
It's most likely a vCPU. So even the caches are shared.
not per core, but per ccx. a ccx is a group of cores. if you need something that isn't in your ccx's chunk of l3 cache you have to hop through the memory controller and pay a latency penalty.
Don't modern processors have more cache available between all cores than available to a single core?